Job Summary
Welcome! Intel Corporation uses cookies and similar technologies on this website to improve your online experience, to analyze site usage and to show tailored advertising to you. For more information, visit ourCookie Notice(https://www.intel.co.uk/content/www/uk/en/privacy/intel-cookie-notice.html). Intel Careers Life at Intel Join Our Talent Community System Modelling Engineer Job Details: Job Description: The Role and Impact: As an Analog and Mixed Signal IP Architect, you will play a pivotal role in shaping the future of Intel's cutting-edge technologies. You will be responsible for driving innovative architectures and algorithms that define the next generation of System-on-Chip (SoC) independent analog and mixed signal IPs. We are seeking an experienced SerDes PHY System Modeling Engineer to lead and support the architecture, modeling, and performance analysis of 224Gbps SerDes IP. This role focuses on endtoend PHY system modeling, including electrical channel, transmitter (TX), receiver (RX), equalization strategies, clocking, and jitter/noise analysis, enabling robust silicon implementation for nextgeneration ASICs and SoCs. Key Responsibilities: System Architecture and Modeling: Develop endtoend behavioral models for 224Gbps SerDes PHYs across TX, channel, and RX. Build statistical and timedomain system models to evaluate BER, eye margins, and link robustness Define PHY performance budgets (jitter, noise, ISI, crosstalk, insertion loss) Model and optimize PAM4...
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