ASIC Physical Design Engineer - 7 to 10 years - Pune

Job Summary

Careers ASIC Physical Design Engineer - 7 to 10 years - Pune remote type Onsite Only What You'll Do We are seeking a talented and expert Physical Design Engineer to join our team as a hands-on implementation engineer for Cisco’s silicon photonics driver integrated circuits, supporting the next generation of 100G, 200G, and 400G‑per‑lambda optical interconnect solutions. You will be part of a broader team delivering high‑performance silicon that integrates control logic, CPU subsystems, high‑speed interfaces, and receive/transmit paths within a silicon photonics module, CPO optical engine. This unique role offers the opportunity to be part of a highly dynamic team driving flows, methodologies, and physical implementation at block level & chip level. Leveraging a strong foundation in back‑end design fundamentals and physical implementation flows, you will own block‑level implementation, support in top level floor planning, place and route, clock and power distribution, timing closure, and physical verification. Specific responsibilities include: Assist in RTL/netlist‑to‑GDSII implementation for block‑level and full‑chip designs in advanced technology nodes. Support digital implementation flows and collaborate with EDA tool vendors to debug issues. Support in developing hierarchical floor plans, macro placement, I/O planning, congestion, timing, and power distribution. Perform static timing analysis (STA), analyze timing reports,...